usb: ehci: add missing cache managment

usb: ehci: add missing cache managment

Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list"
didn't include any cache management in the new interrupt transfer path.
It also added an extra write to or_asynclistaddr in usb_lowlevel_init(),
without having flushed out the data there.

Add the missing cache management calls, so that the code works again.

This allows the USB keyboard on Tegra's Seaboard/Springbank boards to
work.

Cc: Patrick Georgi <[email protected]>
Cc: Vincent Palatin <[email protected]>
Cc: Julius Werner <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Marek Vasut <[email protected]>
Signed-off-by: Stephen Warren <[email protected]>